AVR JTAG ICE User Guide.pdf

JTAG ICE

.....................................................................

User Guide

Table of Contents

Section 1

Introduction ........................................................................................... 1-1

1.1

Features ....................................................................................................1-1

1.2

JTAG ICE and the OCD Concept .............................................................1-2

1.2.4.1

Software Breakpoints ...................................................................1-3

1.2.4.2

Hardware Breakpoints..................................................................1-3

1.3

Device Support .........................................................................................1-4

Section 2

Getting Started...................................................................................... 2-1

2.1

Unpacking the System ..............................................................................2-1

2.2

System Requirements...............................................................................2-1

2.3

Connecting JTAG ICE...............................................................................2-2

2.4

Connecting Power.....................................................................................2-3

Section 3

Frontend Software ................................................................................ 3-1

3.1

Installing AVR Studio ................................................................................3-1

3.2

On-chip Debugging with JTAG ICE ..........................................................3-1

3.2.3.1 Run Timers in Stopped Mode ......................................................3-3

3.2.3.2 OCD communication frequency ...................................................3-3

3.2.5.1 Breakpoint Option 1 .....................................................................3-4

3.2.5.2 Breakpoint Option 2 .....................................................................3-4

3.2.5.3 Breakpoint Option 3 .....................................................................3-4

3.2.6.1 Data Memory Breakpoints............................................................3-4

3.2.6.2 Masked Breakpoint ......................................................................3-4

3.2.6.2.1

Example 1..............................................................................3-6

3.2.6.2.2

Example 2..............................................................................3-6

3.2.6.2.3

Example 3..............................................................................3-6

3.2.6.3

Enable Break on Branch/Skip ......................................................3-6

3.3

Programming with JTAG ICE ....................................................................3-7

Section 4

Special Considerations ......................................................................... 4-1

4.1

I/O Peripherals ..........................................................................................4-1

4.2

Single Stepping .........................................................................................4-1

4.3

Software Breakpoints ................................................................................4-1

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Table of Contents

4.4

Target AVR Reset and Power Down during Debugging ...........................4-2

4.5

JTAG Relevant Fuse Settings...................................................................4-2

4.6

Use AVR Studio 3.52 or Higher ................................................................4-2

4.7

The Message Window ..............................................................................4-2

4.8

JTAG ICE Does not Support Devices in a JTAG Chain............................4-2

4.9

Accessing I/O Registers............................................................................4-2

4.10

Alternative JTAG Pin Functions when Using the JTAG Interface .............4-2

4.11

Verifying the Flash ....................................................................................4-2

Section 5

Hardware Description ........................................................................... 5-1

5.1

General Board Description........................................................................5-1

5.2

Communication Module ............................................................................5-1

5.3

Control Module..........................................................................................5-2

5.4

Level Converters .......................................................................................5-2

5.5

Power Supply ............................................................................................5-4

5.6

JTAG Adapter ...........................................................................................5-4

Section 6

Technical Specifications ....................................................................... 6-1

Section 7

Technical Support................................................................................. 7-1

Section 1

Introduction

Congratulations on purchasing Atmel’s AVR ® JTAG ICE. The JTAG ICE is a complete

tool for On-chip Debugging on all AVR 8-bit microcontrollers with the JTAG interface.

The JTAG interface is a 4-wire Test Access Port (TAP) controller that is compliant with

the IEEE 1149.1 standard. The IEEE standard was developed to enable a standard way

to efficiently test circuit board connectivity (Boundary Scan). Atmel AVR devices have

extended this functionality to include full Programming and On-chip Debugging support.

The JTAG ICE uses the standard JTAG interface to enable the user to do real-time

emulation of the microcontroller while it is running in the target system.

The AVR On-chip Debug protocol (AVROCD) gives the user complete control of the

internal resources of the AVR microcontroller. The JTAG ICE provides emulation capa-

bility at a fraction of the cost of traditional emulators.

1.1

Features

AVR Studio ® Compatible

Supports all AVR Devices with JTAG Interface

Exact Electrical Characteristics

Emulates all Digital and Analog On-chip Functions

Break on Change of Program Flow

Data and Program Memory Breakpoints

Suports Assembler and HLL Source Level Debugging

RS-232 Interface to PC for Programming and Control

Regulated Power Supply for 9-15V DC Power

The JTAG ICE is supported by AVR Studio version 3.52 or higher. For up to date infor-

mation on this and other AVR tool products please read the document “avrtools.pdf”.

The latest version of AVR Studio, “avrtools.pdf” and this user guide can be found in the

AVR section of the Atmel web site, www.atmel.com.

AVR ® JTAG ICE User Guide

1-1

Rev. 2475A-09/01

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