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Texas Instruments Incorporated
High-Performance Analog Products
Analog Applications
Journal
First Quarter, 2011
© Copyright 2011 Texas Instruments
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Texas Instruments Incorporated
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Copyright © 2011, Texas Instruments Incorporated
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High-Performance Analog Products
1Q 2011
Analog Applications Journal
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Texas Instruments Incorporated
Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Data Acquisition
The IBIS model, Part 2: Determining the total quality of an IBIS model . . . . . . . . . . . . . 5
TI is developing a new arsenal of digital input/output buffer information specification (IBIS) simulation
models to meet a variety of customer needs. This article, the second of a three-part series, investigates
IBIS-model validation. Since it is important to know the quality of an IBIS model, this article covers the
four stages of the IBIS Open Forum’s QC process that help insure that the IBIS model provides reliable
simulations with signal integrity.
Power Management
An introduction to the Wireless Power Consortium standard and TI’s
compliant solutions ......................................................... 10
Inductive coupling is the method by which efficient and versatile wireless power can be achieved. This
article provides an overview of the Wireless Power Consortium (WPC) standard and the design
considerations for the power transmitted, the power received, and the communications protocol. Also
included is an introduction to TI’s WPC-compliant solutions in the form of three newly developed ICs.
Fine-tuning TI’s Impedance Track™ battery fuel gauge with LiFePO 4 cells
in shallow-discharge applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Impedance Track technology has been established as an accurate tool for determining a battery pack’s
state of charge (SOC). In applications where full discharge of the battery with a long rest period is not
possible, it is necessary to explore a shallow-discharge option to determine the SOC. As demonstrated
in this article, new battery chemistries like LiFePO 4 require the Impedance Track algorithm to be cus-
tomized to achieve accurate SOC measurements when shallow-discharge cycles are necessary. Included
are calculations and examples for adjusting the algorithm parameters for a specific battery pack.
Interface (Data Transmission)
Designing an isolated I 2 C Bus ® interface by using digital isolators . . . . . . . . . . . . . . . 17
Applications with an I 2 C Bus interface often include machinery and equipment that require isolation.
This article addresses the challenge of designing an isolated I 2 C interface with standard digital isolators.
Included is an overview of I 2 C Bus operation, followed by an analysis of how the bidirectional digital
isolators can affect propagation delays.
Index of Articles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
TI Worldwide Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
To view past issues of the
Analog Applications Journal , visit the Web site
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Analog Applications Journal
1Q 2011
High-Performance Analog Products
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Texas Instruments Incorporated
Introduction
Analog Applications Journal is a collection of analog application articles
designed to give readers a basic understanding of TI products and to provide
simple but practical examples for typical applications. Written not only for
design engineers but also for engineering managers, technicians, system
designers and marketing and sales personnel, the book emphasizes general
application concepts over lengthy mathematical analyses.
These applications are not intended as “how-to” instructions for specific
circuits but as examples of how devices could be used to solve specific design
requirements. Readers will find tutorial information as well as practical
engineering solutions on components from the following categories:
•DataAcquisition
•PowerManagement
•Interface(DataTransmission)
•Amplifiers:OpAmps
Where applicable, readers will also find software routines and program
structures. Finally, Analog Applications Journal includes helpful hints and
rules of thumb to guide readers in preparing for their design.
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High-Performance Analog Products
1Q 2011
Analog Applications Journal
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Texas Instruments Incorporated
Data Acquisition
The IBIS model, Part 2: Determining the
total quality of an IBIS model
By Bonnie C. Baker
Senior Applications Engineer
This article is Part 2 of a three-part series. Part 1 (see
Reference 1) discussed the fundamental elements of digital
input/output buffer information specification (IBIS) simu-
lation models and how they are generated in the SPICE
environment. This article, Part 2, investigates IBIS-model
validation. Part 3, which will appear in a future issue of the
Analog Applications Journal , will show how IBIS users
investigate signal-integrity issues and problems during the
development phase of a printed circuit board (PCB).
IBIS models can be generated from the SPICE deck of
an integrated circuit (IC) or in the lab. In both cases, the
modelingengineercollectsDCdatatogeneratethepower-
clamp, ground-clamp, pull-up, and/or pull-down data for
the various digital buffers on the chip. Following this, data
is collected on the output buffer’s transient or on the AC
rise and fall times. See Reference 1 for more information
on these data-collection processes. The IBIS model’s tran-
sient data replicates the time behavior of output buffers.
The modeling engineer acquires the model data with an
array of power-supply conditions and junction tempera-
tures. Further enhancements include the addition of the
IC’s package characteristics, buffer-input chip capacitance,
and surrounding documentation. Once the IBIS model
exists, the engineer reviews it to verify several quality
stages and then produces a validation report that corre-
lates the IBIS model to SPICE simulations or bench data.
Historically, IBIS models have had a reputation of poor
quality because many IBIS users have received incorrect
models from vendors. The errors range from simple format
errors to the model not really portraying the behavior of
the buffers in the IC at all. Texas Instruments (TI) is com-
mitted to generating quality, reliable IBIS models for cus-
tomers’ signal-integrity investigations.
TheIBISOpenForum’sQualityTaskGroupandModel
Review Task Group have formulated a quality-control (QC)
process using four QC stages, which are described in the
“IBIS Quality Specification,” Version 2.0 (Reference 2).
The IBIS task groups are subcommittees of TechAmerica’s
Systems, Standards & Technology Council. Other model
users and model makers across the industry have also con-
tributed to this QC process. The four QC stages are:
•Stage0:AnautomatedqualitycheckusinganIBISparser
•Stage1:Amanualandvisualqualitycheckofthemodel
•Stage2:CorrelationtoSPICEorhardwaretestdata
•Stage3:CorrelationtobothSPICEandhardwaretest
data
TI performs stages 0, 1, and 2 for its IBIS models,
correlating them with SPICE for stage 2. This article will
describe the nuances of performing stages 0, 1, and 2
(with SPICE correlation only).
Stage 0: IBIS parsers
The first stage of QC for an IBIS model begins with an IBIS
parser program. This computer program provides an
essential first-stage model check, inspecting the IBIS file
for the validity of the IBIS model data and for syntax
errors. This type of program can create “Error,” “Warning,”
and/or “Note” messages in relation to the IBIS model
under test, but creating an IBIS model that is free of these
messages is possible.
For instance, the parser program IBISCHK4 looks for
illegal text types, verifies model types, insures that all
proper variables are available for each model, validates
end points of data, and performs other housekeeping
checks. An example of the results of running an IBISCHK4
program with an IBIS model is shown in the sidebar below.
The “Error,” “Warning,” and “Note” messages from the
parser check provide an opportunity for the IBIS-model
designer to identify errors and easily correct them.
Running a parser with an IBIS model is essential at the
beginning of the quality check; however, the parser does
not provide an exhaustive list of IBIS-model errors and
does not necessarily guarantee a good model.
Example IBISCHK4 results
ERROR (line 137) - Invalid Model_type (“InputX”)
WARNING (line 154) - Vinl should not be specified for model type (null)
WARNING (line 155) - Vinh should not be specified for model type (null)
ERROR - Model ‘sdi_3p3’: Ramp Not Defined
Errors : 2
Warnings: 2
File Failed
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Analog Applications Journal
1Q 2011
High-Performance Analog Products
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