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TDA8143
HORIZONTAL DEFLECTION POWER DRIVER
.
CONTROLLED DRIVING OF THE POWER
TRANSISTOR DURING TURN ON AND OFF
PHASE FOR MINIMUM POWER DISSIPA-
TION AND HIGH RELIABILITY
.
HIGH SOURCE AND SINK CURRENT CAPA-
BILITY
.
DISCHARGE CURRENT DERIVED FROM
PEAK CHARGE CURRENT
.
CONTROLLED DISCHARGE TIMING
.
DISABLE FUNCTION FOR SUPPLY UNDER
VOLTAGE AND NONSYNCHRONOUS OP-
ERATION
.
PROTECTION FUNCTION WITH HYSTERE-
SIS FOR OVERTEMPERATURE
.
OUTPUT DIODE CLAMPING
.
LIMITING OF THE COLLECTOR PEAK CUR-
RENT OF THE DEFLECTION POWER TRAN-
SISTOR DURING TURN ON PERIOD
.
SPECIAL REMOTE FUNCTION WITH DELAY
TIME TO SWITCH THE OUTPUT ON
SIP9
(Plastic Package)
ORDER CODE :
TDA8143
DESCRIPTION
The TDA8143 is a monolithic integrated circuit
designed to drive the horizontal deflection power
tran-sistor.
The current source characteristic of this device is
adapted to the non-linear current gain behaviour of
the power transistor providing a minimum power
dissipation. The TDA8143 is internally protected
against short circuits and thermal overload.
PIN CONNECTIONS
9
8
7
6
5
4
3
2
1
PROTECTION AND REMOTE STANDBY INPUT
CONTROL INPUT
SPECIAL REMOTE STANDBY
C
T
GROUND
SENSE-IN
V+
CC
OUTPUT
GROUND
September 1993
1/9
TDA8143
PIN FUNCTIONS
Pin
Name
Function
1
Power Ground
Common Ground
2
Ouptut
Device Output
3
CC
Supply Voltage
4
Sense Input
Input voltage that determines output current.
5
Sense GND
Reference Ground for Input Voltage at SENSE INPUT.
6
EXT
Capacitor between this terminal and SENSE GROUND determines the current
slope dI
O
/dt during OFF phase.
7
Special Remote/Standby
Low level at this input sets the device after a delay time t
dr
in the standby mode
independent from CONTROL INPUT (2nd priority).
8
Control Input
High level at this input switches the BU508 off, low level switches the BU508 on.
9
Protection and Remote
Standby Input
A high level at this input switches the BU508 off independent from all other inputs
(1st priority).
BLOCK DIAGRAM
V
CC
+
V
H
100k
W
PROTECTION AND
REMOTE STANBY INPUT
9
3
TDA8143
SYNC. DET.
THERMAL
PROTECTION
I
B1
V
27
W
10
m
H
2
BU508
OUT
SPECIAL
REMOTE
STANDBY
220
m
F
4
SENSE
IN
7
I
B2
4.7
W
R
S
&
V
0. 15
W
8
22nF
CONTROL
IN
5
GND
6
1
C
1nF
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage
18
V
I
d
Output Current
Internally Limited
P
tot
Power Dissipation
Internally Limited
T
stg
, T
j
Storage and Junction Temperature
– 40, + 150
°
C
T
oper
Operating Temperature
0, + 70
°
C
THERMAL DATA
Symbol
Parameter
Value
Unit
R
th (j–a)
Thermal Resistance Junction-ambient
Max.
70
°
C/W
R
th (j–c)
Thermal Resistance Junction–case
Max.
10
°
C/W
2/9
TDA8143
ELECTRICAL CHARACTERISTICS
(V
CC
= 12 V, T
amb
= 25
o
C unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
CC
Supply Voltage
7
18
V
I
Q
Quiescent Current
All Inputs Open
10
15
25
mA
I
p0
Positive Output Current (source)
1.5
A
I
n0
Negative Output Current (sink)
2
A
I
o0
Positive quiescent output current forcing
the output to 6 V and the sense input to
ground output externally forced to 6 V.
Remote Input1
Remote Input0
120
50
150
80
200
100
mA
mA
G
ON
Transconductance ON Phase (1)
See Figure 1
1.8
2.0
2.2
A/V
G
OFF
Transconductance OFF Phase (2)
See Figure 1
1.8
2.0
2.2
A/V
G
REMOTE
Transconductance Standby Mode
Remote Input0
0.675
0.75
0.825
A/V
I
5
Current Source Pin 6
V
7
= 500 mV
135
165
200
m
A
R
INS
Sense Input Resistance
V
S
> 0
V
S
< 0
0.7
0.35
1
0.5
1.3
0.7
k
W
I
INS
Sense Input Bias Current
V
S
= 0
Remote Input = 1
– 200
– 300
– 400
m
A
R
SYN
Synchronous Detection Input Resistance
V
SYN
< 7 V
V
SYN
> 7 V
30
7
60
10
150
15
k
W
V
THS
Threshold Voltage of the Synchronous
Detection Input
1
1.8
2.8
V
V
SYN
SYNC DETECT Input Voltage
30
V
V
THA
Threshold Voltage of Control Input
1.5
2
2.5
V
I
INA
Pull up Current of Control Input
0 < V
IN
< V
THA
V
IN
> V
THA
+ 0.5 V
– 50
– 1
– 100
0
– 160
+ 1
m
A
A
m
V
THB
Threshold Voltage Remote Input
1.5
2
2.5
V
I
INB
Pull-up Current of the Remote Input
0 < V
IN
< V
THB
V
IN
> V
THB
+ 0.5 V
– 50
– 1
– 100
0
– 160
+ 1
m
A
m
A
t
dr
Remote Delay Time (3)
190
250
300
s
m
t
don
On Delay Time
3
4.5
m
s
V
CC
–V
OUT
Output Voltage Drop for I
p0
= 1 A
2
2.8
3
V
V
CC ON
Supply Voltage for Device "ON"
I
0
³
0
5.8
6.4
7.0
V
V
CC OFF
Supply Voltage for Device "OFF"
(output internally switched to ground)
5.6
V
CC ON
– 0.2 V
6.8
V
V
S limit
Sense Limit Voltage (4)
0.8
0.9
1
V
Notes :
1.
G
ON
is measured with V
4
varying from 150mV to 350mV (Pin 6 is grounded)
2.
G
OFF
is measured with V
6
varying from 150mV to 350mV (Pin 4 is grounded)
3.
When the remote input goes from HIGH to LOW the BU508 is switched off and it remains in this condition for the time t
dr
.
4.
The sense input voltage V
S
is internally limited and results in a limited positive output current I
p0
= g. V
S
limit. Note that due to
the storage time t
S
of the BU508 limiting of V
S
leads to a reduced base current of the BU508 and the output current I
0
is going to
the positive quiescent current I
o0
.
TRUTH TABLE
Logics Inputs
Output I
0
Mode
Control Input
Remote/Standby
0
Floating or 1
Floating or 1
Floating or 1
I
0
> 0
I
0
< 0 (5)
BU508 ON
BU508 OFF
Normal Function
X
0
I
0
< 0 (5)
0 < t < t
dr
BU508 OFF
Remote/Standby
Function
X
0
I
0
> 0
t > t
dr
BU508 ON
Note :
5.
I
O
< 0 means that the sink current flows into the output to ground.
3/9
TDA8143
Figure 1 :
G
ON
V
Pin3
and
|
G
OFF
|
V
Pin5
G
(A/V)
or
G
(A/V)
ON
OFF
2.2
2.1
2.0
1.9
1.8
V
(mV)
or
V
Pin5
(mV)
Pin3
1.7
0
50
100
150
200
250
300
350
400
450
500
550
600
650
700
750
Figure 2 :
Large Screen Application
+12V
R
f
C
a
STANDBY
D1
3
9
OUT
R
O
8
2
BU508
L
O
C
O
4
TDA8143
R
b
R
S
C
b
5
1
6
C
S
COMPONENTS LIST FOR TYPICAL APPLICATION
CRT
22"/26" 100
°
14"/20" 90
°
CRT
22"/26" 100
°
14"/20" 90
°
C
a
R
o
C
o
L
o
47
m
F
47
m
F
R
b
C
b
R
s
C
s
W
47 nF
0.15
4.7
W
47 nF
0.1
4.7
27
W
2W
27
W
1 W
220
m
F
220
m
F
W
1 nF
W
1 nF
10
m
H
10
m
H
4/9
TDA8143
APPLICATION INFORMATION
The conventional deflection system is shown in
Figure 3. The driving circuit consists of a bipolar
power transistor driven by a transformer and a
medium power element plus some passive compo-
nents.
During the active deflection phase the collector
current of the power transistor is linearly rising and
the driving circuitry must be adapted to the required
base current in order to ensure the power transistor
saturation.
According to the limited components number the
typical approach of the present TVs provides only
a rough approximation of this objective ; in Figure 4
we give a comparison between the typical real base
current and the ideal base current waveform and
the collector waveform.
The marked area represents a useless base cur-
rent which gives an additional power dissipation on
the power transistor.
Furthermore during the turn-ON and turn-OFF tran-
sient phase of the chassis the power transistor is
extremely stressed when the convenctional net-
work cannot guarantee the saturation ; for this
reason, generally, the driving circuit must be care-
fully designed and is different for each deflection
system.
The new approach, using the TDA8143, over-
comes these restrictions by means of a feedback
principle.
As shown in Figure 4, at each instant of time the
ideal base current of the power transistor results
from its collector current divided by such current
gain which ensure the saturation ; thus the required
base current I
b
can be easily generated by a feed-
back transconductance amplifier g
m
which senses
the deflection current across the resistor R
s
at the
emitter of the power transistor and delivers :
I
b
= R
S
I
e
The transconductance must only fulfill the condi-
tion :
·
g
m
·
<
gm
<
1
R
S
where
b
is the minimum current gain of the transitor.
This method always ensures the correct base cur-
rent and acts time independent on principle.
For the turn-OFF, the base of the power transistor
must be discharged by a quasi linear time decreas-
ing current as given in Figure 5.
Conventional driver systems inherently result into
a stable condition with a constant peak current
magnitude.
1
1
+
b
min
×
1
R
S
Figure 3 :
Conventional Horizontal Deflection System for TVs
V
CC
+
DRIVING CIRCUIT
HORIZONTAL
TRANSFORMER
I
C
I
D
I
B
YOKE
DEFLECTION CIRCUIT
V
IN
5/9
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